TSMC AND MAPPER REACHED JOINT DEVELOPMENT MILESTONE

Created on Friday, 19 February 2010 15:12

Hsinchu, Taiwan/Delft, The Netherlands, February 19, 2010

Taiwan Semiconductor Manufacturing Company (TWSE: 2330, NYSE: TSM) and MAPPER Lithography today revealed that a pre-alpha MAPPER tool located on TSMC’s Fab 12 GigaFab™ is repeatedly printing features previously unachievable using current immersion lithography technology.

Over the past several months TSMC has expanded its Maskless Lithography team and has been working with MAPPER engineers at Fab 12 to integrate electron beam direct write capabilities into manufacturing processes for development of future technology nodes.

“TSMC is always searching for the most cost effective manufacturing processes,“ says Dr. Shang-Yi Chiang, TSMC Senior Vice President of Research & Development. “The results coming from our project with MAPPER have met aggressive objectives and mark a significant achievement in our Multiple-E-Beam Direct Write program that covers all viable Multiple-E-Beam technologies. Based on these encouraging results, we are convinced that the Multiple E-Beam technology is one of the technologies to become the future lithography standard.“

Dr. Christopher Hegarty, MAPPER’s CEO adds, “Having TSMC as our launch customer is of great benefit to MAPPER. Now that we have an operational tool at TSMC and we simultaneously intensify our efforts in bringing MAPPER’s technology to market, we are supremely confident that electron beam direct write will be successfully introduced into high-volume manufacturing processes.“

TSMC and MAPPER will present their latest results at the SPIE Advanced Lithography 2010 conference in San Jose, CA.

MAPPER’s Technology

MAPPER develops lithography machines for the chip industry. These machines utilize a new and innovative technology with which the chips of the future can be made cost effectively. MAPPER’s machine provides a highly cost-effective way of making the next generation of chips because it significantly reduces costs by eliminating the photomask while simultaneously providing the ultimate in resolution and high productivity. MAPPER’s technology makes use of massively parallel electron beams, thereby providing the very high resolution of electron beam at extremely high throughput. Current lithography machines use photographic techniques to create minute electrical circuits smaller than 1/100th of a human hair on a silicon wafer. They use a mask that contains the blueprint of the chip and transfer this pattern on to a photosensitive layer (comparable to a photograph being exposed on film), however the photographic techniques used are very limited in the resolution they can provide and are no longer adequate for future generations of semiconductors.

About TSMC

TSMC is the world’s largest dedicated semiconductor foundry, providing the industry’s leading process technology and the foundry’s largest portfolio of processproven libraries, IPs, design tools and reference flows. The Company’s managed capacity in 2009 totaled 9.96 million (8-inch equivalent) wafers, including capacity from two advanced 12-inch GIGAFABs™, four eight-inch fabs, one six-inch fab, as well as TSMC’s wholly owned subsidiaries, WaferTech and TSMC China, and its joint venture fab, SSMC. TSMC is the first foundry to provide 40nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit www.tsmc.com.

About MAPPER Lithography

MAPPER’s offices are located in Delft, The Netherlands, near Delft University of Technology, one of the shareholders. MAPPER has a headcount of 170 people. Shareholders of MAPPER are besides Delft University of Technology professional investors - Capital-C Ventures, KT Venture Group, Quest for Growth and KBC Private Equity - and private investors.

For information

MAPPER Lithography
Bert Jan Kampherbeek, Vice President Market Development
Tel + 31 15 888 0250

TSMC
TSMC Acting Spokesman
J.H. Tzeng, Deputy Director, Public Relations
Tel +886 3 505 5028
Michael Kramer, Senior Administrator, Public Relations
Tel +886 3 505 6216

SOKUDO joins CEA-Leti IMAGINE program to develop multiple E-Beam lithography process

Created on Monday, 20 September 2010 14:09

Grenoble, France, September 20, 2010

SOKUDO Co., Ltd., the lithography coat/develop track process equipment joint venture company, and CEA-Leti today announced that SOKUDO will join the new industry/research multi-partner program IMAGINE that is developing maskless lithography for IC manufacturing.

The three-year project is led by CEA-Leti, the leading French semiconductor research institute, and also includes semiconductor manufacturers TSMC and STMicroelectronics. It is evaluating a maskless lithography infrastructure and the use of MAPPER Lithography tools for high throughput. The multiple e-beam-lithography program covers a global approach to the technology, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.


“E-beam has the potential to be a viable technology for many sub-22nm lithography process layers in logic/foundry semiconductor manufacturing,” said Tadahiro Suhara, SOKUDO president and CEO. “SOKUDO is taking a comprehensive approach to being prepared for coat/develop track process readiness in multiple sub-22nm lithography technologies, including immersion ArF lithography extensions, EUV and e-beam lithography. The CEA-Leti IMAGINE collaboration brings together a focused effort to enable production-worthy e-beam lithography, including multiple resist manufacturers key to sub-22nm process development.”

“We have been working with SOKUDO’s RF3 coat-and-develop track system for many years and the IMAGINE program will benefit from the strong knowledge and support of SOKUDO in developing the necessary processes to support maskless technology,” said Serge Tedesco, CEA-Leti program manager. “The experience of CEA-Leti in e-beam technology combined with SOKUDO’s coat-and-develop track expertise will help secure the necessary process infrastructure for multi e-beam lithography.”

MAPPER Lithography B.V., based in Delft, The Netherlands, makes maskless-lithography machines for the semiconductor industry. It is supporting the IMAGINE project with its massively parallel electron-beam platforms.

About SOKUDO Co., Ltd.


SOKUDO Co., Ltd. (Headquarters: Kyoto, Japan) is a joint venture company principally owned by Dainippon Screen Mfg. Co., Ltd., with a minority interest held by Applied Materials, Inc. SOKUDO was established in 2006 for the development, manufacture, sales and service of advanced coat/develop track equipment for semiconductor production. Additional information on SOKUDO can be found at www.sokudo.com.
.

SOKUDO
 Contact

Charles Pieczulewski


Senior Manager, Strategic Marketing


Phone: +81 75 256 8245


Email: This e-mail address is being protected from spambots. You need JavaScript enabled to view it.

CEA-Leti contact


Serge Tedesco


Phone: +33 4 38 78 49 89


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TOK joins CEA-Leti IMAGINE program to develop multiple E-Beam lithography sub-20nm resists and processes

Created on Friday, 19 February 2010 14:31

Grenoble, France, February 10, 2011

TOK and CEA-Leti today announced that TOK will join the new industry/research multi-partner program IMAGINE that is developing maskless lithography for IC manufacturing.

The three-year project is led by CEA-Leti, a research center committed to creating and commercializing innovation in micro- and nanotechnologies, and also includes semiconductor manufacturers TSMC and STMicroelectronics. It is evaluating a maskless lithography infrastructure and the use of MAPPER Lithography tools for high throughput. The multiple e-beam-lithography program covers a global approach to the technology, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.

“TOK’s material development beyond the 20nm node covers a broad range of technology- platform and lithography-process candidates, such as EUVL, ML2, and DSA. The IMAGINE program at CEA-Leti, which focuses on multiple e-beam lithography, is a very attractive program especially for understanding the fundamental RLS (resolution, line edge roughness and sensitivity) issue in photoresist development,” said Kazufumi Sato, TOK R&D general manager. “TOK will contribute to the program by providing a materials perspective based on our deep knowledge of the electron-beam resist and recent discoveries from the EUV resist development.”

“The development of new chemically amplified resist platforms achieving resolution below 20nm with a line-edge roughness in the nanometer range is one of the main challenges for next-generation lithography,” said Serge Tedesco, CEA-Leti program manager. “We have already built a long and fruitful collaboration with TOK by working together at the introduction of e-beam lithography at the STMicroelectronics Crolles Line. We are very pleased to continue this relationship with a worldwide leader in resist technology, ensuring a boost for the IMAGINE program and reinforcing the semiconductor industry’s commitment to introduce ML2 in manufacturing.”

About TOK

TOK is a world’s leading supplier of photoresists inevitably required for semiconductor and flat panel display. TOK has always been at the forefront of the leading edge
microprocessing technologies based on photolithography as its core technology. And TOK also expands its business, applying the microprocessing technologies developed in semiconductor manufacturing into the fields such as LCD display, semiconductor packaging and other related sectors. In addition to the above, as proposing new fields with innovative fabrication technologies, TOK is vigorously developing the Through Silicon Via (TSV) system which connects between the frontend and backend process in semiconductor manufacturing as well as deploying materials applied for solar cells paid a lot of attention as an energy resource.
Additional information about TOK is available at http://www.tok.co.jp/en/.

TOK contacts

• Tomoyuki Yazawa
+31 33 454 3527
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• Takeyuki Yokoyama
+31 33 450 6028
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CEA-Leti contact

Serge Tedesco
+33 4 38 78 49 89
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STMicroelectronics Joins CEA-Leti IMAGINE Program to Develop Multiple E-Beam Lithography

Created on Monday, 18 January 2010 14:57

Crolles and Grenoble, France, January 18, 2010

STMicroelectronics and CEA-Leti, the leading French semiconductor research institute, have signed an agreement for STMicroelectronics to join the new industry/research multi-partner program IMAGINE, led by CEA-Leti, which includes TSMC, for mask-less lithography for IC manufacturing. This three-year program is meant to allow companies to assess a maskless lithography infrastructure for IC manufacturing and the use of MAPPER* Technology for high-throughput. The multiple e-beam lithography program covers a global approach to the technology, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.

“STMicroelectronics has been working for more than a decade with CEA-Leti on maskless lithography. Together, ST and CEA-Leti have established a full shaped-beam capability on ST’s Crolles pilot line and demonstrated the insertion of e-beam technology in a standard CMOS process flow,“ said Joël Hartmann Silicon-Technology Development Director for STMicroelectronics, at Crolles, France. “Joining the IMAGINE program is a logical step for ST to get access to a mask-less lithography possible solution for future technology nodes.“

“The IMAGINE program will benefit from the strong knowledge and support of STMicroelectronics in maskless technology,“ said Leti’s CEO, Laurent Malier. “The experience of CEA-Leti in e-beam technology has been strengthened over the years by this partnership with ST for using e-beam for advanced technology demonstrators. With STMicroelectronics supporting the IMAGINE program, we are convinced we will succeed to make maskless lithography a viable solution.“

* MAPPER’s offices are located in Delft, The Netherlands, near Delft University of Technology; MAPPER is delivering massively parallel electron beam platforms and this equipment delivery is part of the collaboration program.

About STMicroelectronics

STMicroelectronics is a global leader serving customers across the spectrum of electronics applications with innovative semiconductor solutions. ST aims to be the undisputed leader in multimedia convergence and power applications leveraging its vast array of technologies, design expertise and combination of intellectual property portfolio, strategic partnerships and manufacturing strength. In 2008, the Company’s net revenues were $9.84 billion. Further information on ST can be found at www.st.com.

About CEA-Leti

CEA is a French research and technology organisation, with activities in three main areas: energy, technologies for information and healthcare, and defence and security. Within CEA, the Laboratory for Electronics & Information Technology (CEA-Leti) works with companies in order to increase their competitiveness through technological innovation and transfers. Leti is focused on micro and nanotechnologies and their applications, from wireless devices and systems, to biology and healthcare or photonics. Nanoelectronics and microsystems (MEMS) are at the core of its activities. As a major player in MINATEC excellence centre, Leti operates 8,000-m2 state-of-the-art clean rooms, on 24/7 mode, on 200mm and 300mm wafer standards. With 1,200 employees, Leti trains more than 150 Ph.D. students and hosts 200 assignees from partner companies. Strongly committed to the creation of value for the industry, Leti puts a strong emphasis on intellectual property and owns more than 1,400 patent families. In 2008, contractual income covered more than 75 percent of its budget worth 205 M€. For more information, visit www.leti.fr.

STMicroelectronics Contacts:

Didier Dedeurwaerder
Phone: +33 4 38 92 27 90
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www.st.com

CEA-LETI Contacts:

Serge Tedesco
Phone: +33 4 38 78 49 89
Email : This e-mail address is being protected from spambots. You need JavaScript enabled to view it.
www.leti.fr